Epec's Blog | Electronics Manufacturing Solutions

All customers have questions when it comes to PCB laminate materials, so we took some of the most common questions and put together a helpful FAQ to bring you answers and solutions faster.

The reason printed circuit boards (PCBs) require a surface finish rather than being left as simply bare copper is because while copper is an excellent conductor, leaving it exposed will cause it to oxidize and deteriorate over time. The increased exposure will cause the PCB to fail much sooner than expected.

When you’re in the process of designing a new product, the last thing you are thinking about is the how the product is going to be packaged for transit. However, failure to prepare for and understand electronics packaging regarding how both your components and your finished unit are going to ship is a costly oversight.

I can remember the first ‘incident’ of black pad, years ago, when Epec started to use the electroless nickel immersion gold (ENIG) process. We didn’t notice the issue at the time, as it is not evident on the bare board, but received the complaint from assembly as it was later identified on completed assemblies.

If you’re a designer of RF or microwave printed circuit boards you’ve probably already selected a laminate material that is appropriate to your project, having based your choice primarily on the electrical requirements of the circuit, such as signal speed, loss rate etc. Be careful, however, not to overlook the fact that the specialty materials used in such designs also possess unusual mechanical characteristics; processing is different from that of normal FR4 boards.

The V-score process is the addition of thin, double-sided cuts into printed circuit board (PCB) laminate for the purpose of assisting in the removal of individual parts from the array. The thin cuts which do not go all the way through the material, act as a perforation of the laminate so simple flexing of the laminate, or use of a cutting wheel, will aid in the removal of parts after the assembly process.

Miniaturization in electronics drives the need for both component and printed circuit board designers to work within ever-shrinking footprints in order to remain competitive. The signal routing requirements for many ball grid array (BGA) components are such that through hole via drilling is becoming less and less practical. This makes it necessary in many instances to use blind vias to form interconnections between layer pairs.

Printed circuit boards (PCBs) continue to shrink. As each generation of miniaturized components comes along, board designers find themselves able to work within ever-smaller PCB footprint sizes. While this is great news for consumers (compare the size of a 1994 portable phone to one of today’s models) it presents difficulties for fabricators.

Even though the last financial crisis was over 8 years ago, most engineering departments at electronic OEMs have never fully staffed back to the levels that they were before the economic disaster. That means that there are many engineers doing two or more jobs, all while their senior management still insists on meeting tight timelines with limited budgets.

As printed circuit board (PCB) designs have increased in complexity, they have both decreased in size and increased in density. Physical changed to circuit boards have forced PCB designers and manufacturers to develop new PCB layout strategies aimed at making full use of all available surface area.