As a contract manufacturer, say you receive a new circuit board part to assemble that is 6-layers with a high micro-via count, has blind and buried vias, and a lead free HASL finish. The circuit board laminate requirement for meeting the Restriction of Hazardous Substances, or RoHS compliance, is strictly Glass Transition Temperature(Tg) 170.
Bow and twist of printed circuit boards (PCB) routinely rank among the highest levels of falsely identified non-conformance because it is perhaps the least understood. Envisioning a perfectly flat rigid circuit board as the standard is a fallacy believed by many incoming inspectors. Understanding the reasons and causes for PCB bow and twist can help resolve the issue at the board design stage.
As printed circuit board (PCB) designs get more demanding with advances in technology involving complex footprints and added costs to components, incoming inspection of printed circuit boards must take higher priority.
There was a time when “Made in China” was synonymous with cheaper, poor quality products. "Buyer beware" was the common theme associated with outsourcing to any Asian PCB manufacturers. So how did Epec approach this challenge and succeed? It was by managing quality through intense auditing, training, and qualification. Epec understood at a very early stage that first-class quality products from Asian manufacturers would require consistent presence, training, and auditing.
Cleanliness of bare circuit boards increases in importance with advances in PCB technology that continue to decrease conductor spacing. Inorganic contamination within printed circuit board fabrication can lead to electrochemical migration. Electrochemical migration is the dissolution and movement of metal ions in presence of electric potential, which results in the growth of dendritic structures between anode and cathode. These dendritic growths, which were minimal over periods of time, were not a concern of "yesterdays" bare boards.
When creating your optimal circuit board design, one factor that must be considered is the solder mask and whether to go with matte finish solder mask or gloss finish mask for your final product. Usually, most designers don't specify their preference and end up leaving the decision to the PCB fabricator. Most fabricators will likely default to a gloss surface finish, the more popular choice of the two.
When designing PCBs in a multi-up array, most designers choose v-score (also referred to as v score, v cut, or v groove) as the singulation method over traditional rout and breakaway tabs. The benefits of v-scoring pcb range from effortless removal of parts from panel form to realized cost savings with better utilization of panel area. When designing circuit boards in array with v-scoring, there are two areas of concern - the angle of the cut, and the depth of the cut.
For rigid-flex printed circuit boards (PCBs), the space joining rigid material to flex material (Transition Zone) sometimes contains imperfections that, although acceptable, could impact effectiveness of the final part. Transition zone imperfections can include any of the following:
- Adhesive squeeze-out
- Protruding dielectric materials
When a blow hole defect occurs during the assembly process as a result of the PCB card, the primary culprit tends to be entrapped moisture or air. With moisture, any non-plated and non-masked areas on a bare circuit board that expose internal laminate can be suspect to absorbing moisture. Absorption can occur either during the board fabrication process or from improper storage. Examples of highly suspect areas include non-plated drilled holes and routed features.
It is not recommended to bake boards with an organic solderability preserve (OSP) surface finish. Although baking a printed circuit board with an organic solderability preserve finish can have negative consequences, the process itself can have positive performance in specific applications. OSP is a very thin protective layer of material placed over exposed copper, typically using a conveyorized process to protect the copper from tarnish.